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Monday, June 24 • 14:00 - 14:15
Flow and HQoS DPDK Acceleration Using 100GBE Intel Programmable Acceleration Card: Rosen Xu, Intel

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This presentation discussed the new 100Gbe Intel Programmable Acceleration Card Ethernet feature in DPDK, how to transit from dedicated NIC to FPGA based Acceleration NIC using Intel FPGA._x000D_
Telcos and Cloud providers are looking for the balance between performance and expansibility when building next generation data centers. Traditional solutions would have to rely either on software solutions, which is very flexible but low performance, or on dedicated silicon hardware, which has high performance but poor expansibility. To solve this challenge, this FPGA based card provides the high performance and versatility of FPGA acceleration IP offers both inline and lookaside acceleration._x000D_
We introduce a classification methodology that enables a hybrid data plane consist of DPDK and the FPGA Acceleration IP. Aside from this, we also present unified software API including silicon NIC features and Acceleration IP features.

avatar for Rosen Xu

Rosen Xu

Senior Software Engineer, Intel
Rosen(Weihua) Xu is a senior software engineer at Intel Network Platforms Group (NPG). He has over ten years of experience in Linux Kernel, FPGA design, system virtualization and CPU acceleration.

Monday June 24, 2019 14:00 - 14:15 CST